DLX

ASPIDA Project
ASynchronous, open source, Processor IP of the DLX Architecture. Goal: show feasibility to design and deliver asynchronous open IPs in portable, re-usable way. Information, downloads. Open source hardware.
http://www.ics.forth.gr/carv/aspida/

David R. Kaeli, Professor
Director of Northeastern University Computer Architecture Research Laboratory, and co-author of Computer Architecture: A Quantitative Approach. Professional information with some links.
http://www.ece.neu.edu/faculty/kaeli.html

DLX Architecture
Introductory HTML slide show.
http://www.cs.cinvestav.mx/SC/prof_personal/adiaz/vhdl/DLX/index.htm

DLX CPU in SCMOS
Photo with descriptions.
http://www.erc.msstate.edu/mpl/distributions/scmos/html/dlx.html

DLX (deLuxe)
Instructions: R-, I-, J-Types. WinDLX download. WinDLX opcodes. DLX architecture diagram; Assembly examples: division by subtraction.
http://www.cs.panam.edu/~cherba/Teaching/2003/Spring/COSC4700-ComputerDesign/DLX/

DLX Explained
Basic description, pipeline focused.
http://www.geocities.com/Vienna/7079/src/dlx/dlx_explained.html

DLX Implementation at MSU
Documents DLX implementation by Microsystems Prototyping Laboratory (MPL), MSU Engineering Research Center; used as design driver to help validate standard cell libraries.
http://www.hpc.msstate.edu/mpl/education/docs/dlx/

DLX in VHDL
VHDL model of processor; most instructions use 5 clock cycles to run, jumps use 3, floating point timing not fully accurate because fp instructions also take 5 cycles to run; description, download.
http://www.cse.lehigh.edu/~caar/lou/dlx.html

DLX Information
Documents: getting started, instruction set summary and description, simulator manual.
http://www.ece.umd.edu/class/enee350h.F2005/dlx.html

The DLX Instruction Set Architecture Handbook
By Philip M. Sailer, David R. Kaeli; Morgan Kaufmann, 1996, ISBN 1558603719, 1st edition. Definitive work on DLX instructions. Information and abstract. ACM Portal.
http://portal.acm.org/citation.cfm?id=546884

The DLX Instruction Set, BYU Edition
Expanded annotated list. By James Archibald, Brigham Young University.
http://www.ee.byu.edu/class/ee428/labs/DLXinst.html

DLX Instruction Slides
Tables of instructions, categorized, as PDF slides. By Guy Even, Tel Aviv University. [PDF]
http://www.eng.tau.ac.il/~guy/Computer_Structure03/slides/instructions.pdf

DLX Pipeline Processor
Simple DLX implementation using VHDL; diagrams, descriptions, links.
http://lsdis.cs.uga.edu/~kaarthik/projects/dlx.html

The DLX Processor
Class overview with tables (instruction format, set) and diagrams (timing), some other information. By Ethan Miller, University of Maryland.
http://www.csee.umbc.edu/courses/undergraduate/411/spring96/dlx.html

DLX Simulation Tools
Set of tools to build and simulate programs to run on DLX architecture, for exploring an operating system (DLXOS) in a simulated environment. Overview, architecture, OS, simulator, debugger, instructions.
http://www2.ucsc.edu/courses/cmps111-elm/dlx/

DLXview
Interactive visual pipeline simulator using DLX instruction set; operation of pipelined processor is easier to understand than trying to imagine operation from text descriptions; modified and extended from DLXsim. Documents, downloads.
http://cobweb.ecn.purdue.edu/~teamaaa/dlxview/

Implementation of 5-stage DLX Pipeline
Introductory tutorial with definitions, explanations, examples to show basic pipelining ideas; applet simulation lets users choose instructions to run, and see how pipeline works from direct experience.
http://www.cs.umd.edu/class/fall2001/cmsc411/proj01/DLX/

Introduction to Operating Systems
DLXOS information needed for programming, from introductory course on OSs.
http://www.soe.ucsc.edu/~sbrandt/courses/Spring02/111/dlxos.html

Norman Matloff's DLX Tutorial
Information on DLX processor simulator and compiler, DLXsim, interactive program, loads assembly programs and simulates operation of computer on them, single-stepping or continuous execution.
http://heather.cs.ucdavis.edu/~matloff/dlx.html

Out of Order Execution
Master's Thesis: Design and Evaluation of a RISC Processor with a Tomasulo Scheduler. Uses DLX. HTML, PS, GZ, PDF.
http://www.kroening.com/diplom/

Superscalar DLX Processor
Diagram, description, download.
http://www.rs.tu-darmstadt.de/downloads/docu/dlxdocu/SuperscalarDLX.html

Verilog Model for DLX Processor
PDF slides, mostly code. [PDF]
http://eceweb.uccs.edu/wang/ECE4480/DLXverilog.pdf

Wikipedia: DLX
Encyclopedia article with links to many related topics.
http://en.wikipedia.org/wiki/DLX

WinDLX
Program for MS Windows, an assembly interpreter for DLX assembly language; instructions, source code, downloads. By Javier Echaiz, National University of the South.
http://cs.uns.edu.ar/~jechaiz/arquitectura/windlx/windlx.html

Computer Architecture: A Quantitative Approach
By John L. Hennessy, David A. Patterson; Morgan Kaufmann, 2007, ISBN 9780123704900, 4th edition. Design in quantitative terms, in context of real running systems, not abstract formats; how technology changes in time, empirical constants needed in design. <small>(2007)</small>
http://www.elsevierdirect.com/product.jsp?lid=100004&isbn=9780123704900

Computer Architecture: A Quantitative Approach
Book review, explains that book is a classic and standard work in its field. Ars Technica. <small>(September, 1999)</small>
http://arstechnica.com/etc/books/comp-arc.html